ADC
– 200K Samples per Second
– Input can be Selected from any of the EightAnalog Inputs Multiplexed Through an 8:1
Analog Switch
– Can be Configured to Operate as a 4-Wire, 5-Wire, or 8-Wire Resistive Touch Screen
Controller (TSC) Interface
– Up to Three 32-Bit eCAP Modules
– Configurable as Three Capture Inputs orThree Auxiliary PWM Outputs
– Up to Three Enhanced High-Resolution PWMModules (eHRPWMs)
– Dedicated 16-Bit Time-Base Counter WithTime and Frequency Controls
– Configurable as Six Single-Ended, Six Dual-Edge Symmetric, or Three Dual-Edge Asymmetric Outputs
– Up to Three 32-Bit Enhanced QuadratureEncoder Pulse (eQEP) Modules
• Device Identification
– Contains Electrical Fuse Farm (FuseFarm) ofWhich Some Bits are Factory Programmable
– Production ID
– Device Part Number (Unique JTAG ID)
– Device Revision (Readable by Host ARM)
• Debug Interface Support
– JTAG and cJTAG for ARM (Cortex-A8 andPRCM), PRU-ICSS Debug
– Supports Device Boundary Scan
– Supports IEEE 1500
• DMA
– On-Chip Enhanced DMA Controller (EDMA) hasThree Third-Party Transfer Controllers (TPTCs)and One Third-Party Channel Controller(TPCC), Which Supports up to 64
Programmable Logical Channels and EightQDMA Channels. EDMA is Used for:
– Transfers to and from On-Chip Memories
– Transfers to and from External Storage(EMIF, GPMC, Slave Peripherals)
• Inter-Processor Communication (IPC)
– Integrates Hardware-Based Mailbox for IPC andSpinlock for Process Synchronization BetweenCortex-A8, PRCM, and PRU-ICSS
– Mailbox Registers that Generate Interrupts
– Four Initiators (Cortex-A8, PRCM, PRU0,PRU1)
– Spinlock has 128 Software-Assigned LockRegisters
• Security
– Crypto Hardware Accelerators (AES, SHA,RNG) – Secure Boot (责任编辑:admin) |